1. Field of the Invention
This invention relates to a semiconductor device that includes field-effect transistors.
2. Description of Related Art
For example, a trench-gate type VDMOSFET (Vertical Double diffused Metal Oxide Semiconductor Field Effect Transistor) is known as a power MOSFET that has low on-resistance properties.
FIG. 8 is a schematic sectional view of a semiconductor device that includes conventional trench-gate type VDMOSFETs.
The semiconductor device 101 has an N+type substrate 102. An epitaxial layer 103 is laminated on the substrate 102. A base layer portion of the epitaxial layer 103 serves as an N−type low-concentrated drain region 104. A surface layer portion of the epitaxial layer 103 is formed as a P type body region 105 contiguous to the low-concentrated drain region 104.
The epitaxial layer 103 has a plurality of gate trenches 106 formed by digging in from the surface of the epitaxial layer 103. The gate trenches 106 are spaced at predetermined gaps, and are extended in the same direction in parallel with each other. The gate trenches 106 penetrate the body region 105, so that deepest portions thereof reach the low-concentrated drain region 104. A gate electrode 108 made of polysilicon doped with highly-concentrated N type impurities is embedded in each gate trench 106 with a gate insulating film 107 between the gate electrode 108 and the epitaxial layer 103.
N+type source regions 109 are formed on the surface layer portion of the body region 105. Furthermore, P+type body contact regions 110 penetrate the source regions 109 in a layer thickness direction, and are formed at a gap from the gate trenches 106 at the surface layer portion of the body region 105.
An interlayer insulating film 111 is laminated on the epitaxial layer 103. Contact holes 112 are formed in the interlayer insulating film 111 at positions that face respective body contact regions 110 and parts of the source region 109 surrounding the same. A source wiring 113 is formed on the interlayer insulating film 111. Parts of the source wiring 113 enter the contact holes 112. As a result, a contact plug 114 is formed in the contact hole 112. The contact plug 114 is brought into contact (butting contact) with the source region 109 and with the body contact region 110 while stretching between the surface of the source region 109 and the surface of the body contact region 110.
A drain electrode 115 is formed on a back surface of the substrate 102.
The source wiring 113 is grounded, and the electric potential (gate voltage) of the gate electrode 108 is controlled while applying an appropriate amount of positive voltage to the drain electrode 115. Therefore, channels are formed near interfaces with the gate insulating films 107 in the body region 105, and electric current flow between the source regions 109 and the drain electrode 115.
In the trench-gate type VDMOSFET, the on-resistance can be further reduced by cell shrinkage in which the unit cell area is reduced.
However, with the progress of the cell shrinkage, the distance between the gate trench 106 and the body contact region 110 becomes smaller. Accordingly, the area of a portion facing the contact hole 112 in the source region 109 becomes small, and hence the contact area between the source region 109 and the contact plug 114 becomes small. As a result, the contact resistance between the source region 109 and the contact plug 114 is increased. The increase in the contact resistance is obstructive to a decrease in the on-resistance.
Additionally, with the progress of the cell shrinkage, the area of the body contact region 110 also becomes smaller. If the area of the body contact region 110 is small, a slight deviation of the formation position of the contact hole 112 from its normal position will disenable the contact hole 112 to face the body contact region 110, and hence there is a fear that the body contact region 110 and the contact plug 114 cannot be brought into contact with each other. Therefore, with the progress of the cell shrinkage, a permissible range with respect to a deviation of the formation position of the contact hole 112 becomes smaller, and hence the contact hole 112 is required to be formed with high accuracy.
In field-effect transistors other than the trench-gate type VDMOSFET without being limited to the trench-gate type VDMOSFET, the problem of the increase in the contact resistance (the problem of the decrease in the contact area) arises as a result of the cell shrinkage.